|
Pin
|
Symbol
|
Level
|
Function
|
|
1
|
VGL
|
VI
|
Gate
output low voltage |
|
2
|
VGH
|
VI
|
Gate output high voltage |
|
3
|
VCOM
|
VI
|
VCOM
input signal |
|
4
|
GND
|
VI
|
Digital
ground |
|
5
|
RESETB
|
I
|
Hardware
global reset. Low active. Normally pull high. |
|
6
|
UD
|
I
|
Ud/down
scan setting. When UD="H", down to up.
When UD="L", up to down. |
|
7
|
LRC
|
I
|
The
shift direction of device internal shift register is controlled
by this Pin as shown below: LRC="H", left to
right LRC="L", right to left |
|
8
|
IF2
|
I
|
Control
the input data format. |
|
9
|
IF1
|
I
|
Control
the input data format. |
|
10
|
SPENA
|
I
|
Serial
port Data Enable Signal. Normally pull high. |
|
11
|
SPCK
|
I
|
Serial
port Clock. Normally pull high. |
|
12
|
SPDA
|
I/O
|
Serial
port Data input/output. |
|
13
|
POL
|
O
|
Polarity
select for the line inversion control signal.
When POL="H", output voltage is positive polarity
When POL="L", output voltage is negative polarity |
|
14
|
B7
|
I
|
Digital
data input. B0 is LSB and B7 is MSB
1. If parallel RGB input mode is used, BX, GX, and RX/DX
indicate B, G, and R data in turn.
2. If serial RGB or CCIR601/656 input mode is select,
only D0 - D7 are used, and others short to GND.
|
|
15
|
B6
|
I
|
|
16
|
B5
|
I
|
|
17
|
B4
|
I
|
|
18
|
B3
|
I
|
|
19
|
B2
|
I
|
|
20
|
B1
|
I
|
|
21
|
B0
|
I
|
|
22
|
VLED1
|
VI
|
Power
supply of LED1 back light. |
|
23
|
VLED2
|
VI
|
Power
supply of LED2 back light. |
|
24
|
GLED2
|
VI
|
Ground
of LED2 back light. |
|
25
|
GLED1
|
VI
|
Ground
of LED1 back light. |
|
26
|
G7
|
I
|
Digital
data input. G0 is LSB and G7 is MSB
1. If parallel RGB input mode is used, BX, GX, and RX/DX
indicate B, G, and R data in turn.
2. If serial RGB or CCIR601/656 input mode is select,
only D0 -
D7 are used, and others short to GND.
|
|
27
|
G6
|
I
|
|
28
|
G5
|
I
|
|
29
|
G4
|
I
|
|
30
|
G3
|
I
|
|
31
|
G2
|
I
|
|
32
|
G1
|
I
|
|
33
|
G0
|
I
|
|
34
|
VDD
|
VI
|
Analog
power. 4.5V - 5.5V. |
|
35
|
VSS
|
VI
|
Analog
ground. |
|
36
|
R7/D7
|
I
|
Analog
ground.
Digital data input. R0/D0 is LSB and R7/D7 is MSB
1. If parallel RGB input mode is used, BX, GX, and RX/DX
indicate
B, G, and R data in turn.
2. If serial RGB or CCIR601/656 input mode is select,
only D0 -
D7 are used, and others short to GND.
|
|
37
|
R6/D6
|
I
|
|
38
|
R5/D5
|
I
|
|
39
|
R4/D4
|
I
|
|
40
|
R3/D3
|
I
|
|
41
|
R2/D2
|
I
|
|
42
|
R1/D1
|
I
|
|
43
|
R0/D0
|
I
|
|
44
|
CLK
|
I
|
Clock
signal. Latching data at the rising edge. |
|
45
|
IHS
|
I
|
Horizontal
sync in digital RGB mode. Or HREF input in CCIR601
mode. (Short to GND if not used) |
|
46
|
IVS
|
I
|
Vertical
sync in digital RGB mode. Or VREF input in CCIR601
mode. (Short to GND if not used). |
|
47
|
DEN
|
I
|
Input data enable
control. Normally pull low |
|
48
|
STB
|
I
|
Standby
mode control. Normally pull high When STB="L",source
driver and DAC are off. All outputs are shorted to VSS.When
STB="H", source driver and DAC are on.
|
|
49
|
VCC
|
I
|
Digital
power. 3V - 3.6V. |
|
50
|
VCC
|
I
|
Digital
power. 3V - 3.6V. |
|
|
|
|
|
C
